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首页> 外文期刊>Proceedings of the IEE - Part B: Electronic and Communication Engineering >Magnetostrictive delay-line stores operating at 1 Mc/s using transistor circuits
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Magnetostrictive delay-line stores operating at 1 Mc/s using transistor circuits

机译:使用晶体管电路以1 Mc / s的速度运行的磁致伸缩延迟线存储器

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The paper describes two magnetostrictive delay-line stores which have been developed for use in data processing. The use of transistors has enabled the stores to be constructed in the form of compact plug-in units using printed wiring. One delay line has a delay time of 100 microsec and the other has a delay of 1 millisec. Both use a repetition rate of 1 Mc/s. They therefore store 100 and 1000 binary digits, respectively. The lines use Permendur wire to transmit a longitudinal stress wave. The 1 millisec line has a temperature-compensating device which adjusts the distance between the transducer coils in order to keep the delay time-constant to within ±0.1 microsec over a temperature range of 20°C. The recirculation path of the store is provided by a transistor circuit. The small output signal from the receiving coil of the line is amplified by multi-stage negative-feedback amplifier. Output pulses from the amplifier are shaped by a transistor clipping stage and then lengthened by a novel circuit utilizing the hole-storage effect. The output of the pulse lengthener is gated by clock pulses. This arrangement permits the delay time of the line to vary by 0.6 microsec without affecting the timing of the gated pulses. These pulses are lengthened by a further hole-storage circuit and they supply an output to external circuits via an emitter-follower. The output pulses are of 8 volts amplitude and have rise and fall times of 60 millimicrosec. The output pulses are also fed via `write¿ and `erase¿ gates to the transistor amplifier which drives the sending coil of the line. A companion paper describes circuits for performing logical operations in association with these delay-line stores.
机译:本文介绍了两个磁致伸缩延迟线存储器,它们已开发用于数据处理。晶体管的使用使得商店可以使用印刷线路以紧凑的插入式单元的形式构造。一条延迟线的延迟时间为100微秒,另一条延迟线为1毫秒。两者都使用1 Mc / s的重复率。因此,它们分别存储100和1000个二进制数字。这些线使用Permendur导线传输纵向应力波。 1毫厘线具有温度补偿装置,该装置可调节换能器线圈之间的距离,以便在20°C的温度范围内将延迟时间常数保持在±0.1微秒内。存储器的再循环路径由晶体管电路提供。来自线路接收线圈的少量输出信号被多级负反馈放大器放大。来自放大器的输出脉冲由晶体管限幅级整形,然后由利用空穴存储效应的新型电路延长。脉冲延长器的输出由时钟脉冲控制。这种布置允许线路的延迟时间变化0.6微秒,而不会影响门控脉冲的时序。这些脉冲通过另一个空穴存储电路延长,并通过射极跟随器向外部电路提供输出。输出脉冲的幅度为8伏,上升和下降时间为60毫秒。输出脉冲也通过“写”和“擦除”门馈送到晶体管放大器,后者驱动线路的发送线圈。随附的论文描述了与这些延迟线存储器相关联的用于执行逻辑运算的电路。

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