As BGA packages continue to handle more I/Os with minimum increase in size, signal escape routing can be quite difficult. The number of PCB layers required to escape all the pins depends on several factors. Some of these factors, like the ball pitch and land size, are device specific and need to be factored prior to starting board layout. The others have to be figured out by the designer. Board designers will always be pushed toward using the minimum number of routing layers to reduce cost, especially when using a strip line structure. Hence, successful and effective routing will always be a challenge for the PCB designer.
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