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A V-Band Low-Power Compact LNA in 130-nm SiGe BiCMOS Technology

机译:130-NM SiGE BICMOS技术中的V波段低功耗紧凑型LNA

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This letter presents the design of a V-band low-power compact low-noise amplifier (LNA) in a 130-nm SiGe BiCMOS technology. For the low-power and low-noise requirements, transistors need to operate with low-voltage supply and low current density, which comes at the cost of lower gain per BJT stage. We use a technique to cancel the Miller capacitance in a single-stage differential amplifier and achieve high-gain, low-power, and low-noise simultaneously. The circuit topology is analyzed, and the transistor core layout and the matching network design considerations are discussed. The measured circuit shows a peak gain of 14.1 dB in a 3-dB bandwidth from 44 to 67 GHz while consuming 5.1 mW. Experimental results show an output power of 7.1 dBm at 1-dB compression with an associated power-added efficiency of 30%. The simulated noise figure is 3.3 dB at the center frequency. To the best of the authors' knowledge, the highest figure of merit among V-band LNAs based on silicon is reported.
机译:这封信在130nm SiGe Bicmos技术中介绍了V波段低功耗紧凑型低噪声放大器(LNA)。 对于低功耗和低噪声要求,晶体管需要以低电压供应和低电流密度操作,以低于每个BJT阶段的降低成本。 我们使用一种技术在单级差分放大器中取消米勒电容,并同时实现高增益,低功耗和低噪声。 分析了电路拓扑,讨论了晶体管芯布局和匹配的网络设计考虑。 测量电路显示在44至67GHz的3-DB带宽中为14.1dB的峰值增益,同时消耗5.1兆瓦。 实验结果显示,在1-DB压缩下的输出功率为7.1dBm,相关的电力增加效率为30%。 中央频率下模拟噪声系数为3.3 dB。 据作者所知,报道了基于硅的V波段LNA中的最高优点。

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