Coupled-Line-Based Ka-Band CMOS Power Dividers

摘要

We present the design and analysis of coupled-line-based Ka-band CMOS power dividers. A single spiral structure with a symmetrical layout is adopted to achieve a miniature area and small amplitude imbalance (AI) and phase difference (PD) performance. The first divider (divider-1) achieves S-21 and S-31 of -4.029 and -4.008 dB, respectively, at 33 GHz. The corresponding AI and PD are -0.021 dB and 0.369 degrees, respectively. Moreover, the second divider (divider-2) achieves S-21 and S-31 of -4.093 and -4.055 dB, respectively, at 33 GHz. The corresponding AI and PD are -0.038 dB and 0.148 degrees, respectively. The chip area is 1.7 x 10(-4) lambda(2)(0), one of the smallest normalized chip area ever reported for millimeter-wave (mm-wave) dividers. The prominent results of the dividers indicate that they are suitable for power division/combination in mm-wave transceivers.