A low-complexity low-spurs digital architecture for wideband PLL applications

摘要

This paper presents a non-ideality analysis of the wideband frequency synthesizer, and proposes a new digital architecture for signal modulation and quantization. Using error masking strategy, this method can offer smaller routing area and less power consumption without sacrificing any system performance. Simulation results confirm the theoretical predictions. Finally, the design guidelines are derived to fulfill the customized synthesizer specifications.