Pipelined Cartesian-to-Polar Coordinate Conversion Based on SRT Division

摘要

This brief proposes a new Cartesian-to-polar coordinate conversion technique based on the radix-4 SRT division. The coarse quotient is used to derive the magnitude and the coarse phase by referring to tables, while the fine quotient is applied to linearly interpolate the fine phase to be added to the coarse phase. Compared to the CORDIC-based techniques, the proposed conversion requires less internal word-length and provides parallelism between internal stages, resulting in reduced computation latency and small chip area. A prototype chip designed using 0.25-$mu{hbox {m}}$ CMOS technology occupies 0.203 ${hbox {mm}}^{2}$, and post-layout simulations show maximum frequency of 400 MHz and power consumption of 170 mW at 2.5 V.