PSK Demodulator for High Bit Rate Telecommand System

摘要

The paper presented here discusses a high bit-rate telecommand PSK demodulator that is developed for use in the telecommand receivers of future ISRO satellites. It essentially consists of two parts; a Costa's-loop PSK demodulator and a PLL-based clock recovery circuit. The costas-loop design is based on analog components such as anlog multipliers, operational amplifiers which are available in Hi-rel version. The sub-carrier is provided by either a VCO or VCXO. A PLL-based clock-recovery circuit for NRZ-l telecommand data format is part of the system. The paper covers, the design considerations, basic circuit implementation, a simple mathematical analysis, interfaces and performance evaluation of the system.