A Ka-band high bit rate QPSK demodulator front end.

摘要

With the increasing demand of broadband wireless applications such as: WLAN, automotive radars, and other high-bit-rate point-to-point wireless applications, the lower RF frequency bands are getting congested and the higher frequency bands at the millimeter-wave frequencies are being explored. However, moving toward higher frequencies necessitates the development of inexpensive millimeter-wave transmitters/receivers for base stations and subscriber terminals with several gigabit/sec transmission capacity. A receiver architecture that offers unique advantages (reduced circuit complexity and high-level of circuit integration) at millimeter-wave frequencies is the direct conversion receiver (DCR). Accordingly, the work on this thesis focuses on the development of some of the essential components of a high bit rate Ka-band direct conversion receiver front-end. First, the development of a novel monolithic passive quadrature differential coupler implemented using the silicon-based IBM SiGeHP5 technology. The coupler utilizes a combination of broadside and edge coupling to achieve the tight coupling required over the frequency band from 15 to 45 GHz. A measured return loss better than 20 dB, with an isolation of 15 dB, and an adequate phase and amplitude mismatch have been achieved over 3:1 bandwidth centered at 30 GHz. In order to provide an integrated local oscillator source for the receiver front-end two oscillator configurations have been developed: a fully integrated Ka-band differential SiGe-HBT voltage controlled oscillator (VCO), and a 26 GHz differential dielectric resonator oscillator (DRO). Both configurations utilize the same oscillator core. They both integrate an output buffer stage and were implemented using the silicon based IBM SiGeHP5 process. For the VCO configuration a high-Q fully integrated tank circuit has been implemented; while for the DRO configuration a novel coupling mechanism has been developed to excite the DR in the presence of conducting silicon substrate. The VCO measured performance shows an output power of -3.85 dBm at 24.06 GHz with a phase noise of -98.5 dBc/Hz at 1 MHz offset and a tuning range of 1 GHz over a control voltage from -3 to 5V. For the DRO an oscillation frequency of 25.956 GHz has been achieved with phase noise of -104 dBc/Hz at 1 MHz offset and an output power of -9.49 dBm.