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首页> 外文期刊>Journal of semiconductor technology and science >Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection
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Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection

机译:具有改善的电源抑制功能的低压降(LDO)稳压器

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The power supply rejection (PSR) of low drop-out (LDO) voltage regulator is improved by employing an error amplifier (EA) which is configured so the power supply noise be cancelled at the output. The LDO regulator is implemented in a 0.13-μm standard CMOS technology. The external supply voltage level is 1.2-V and the output is 1.0-V while the load current can range from 0-mA to 50-mA. The power supply rejection is 46-dB, 49-dB, and 38-dB at DC, 2-MHz, and 10-MHz, respectively. The quiescent current consumption is 65-μA.
机译:低压差(LDO)电压调节器的电源抑制(PSR)通过采用误差放大器(EA)进行了改进,该误差放大器被配置为可消除输出端的电源噪声。 LDO稳压器采用0.13μm标准CMOS技术实现。外部电源电压为1.2V,输出为1.0V,而负载电流范围为0mA至50mA。在直流,2 MHz和10 MHz时,电源抑制分别为46 dB,49 dB和38 dB。静态电流消耗为65μA。

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