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Test Data Compression Using Multi-dimensional Pattern Run-length Codes

机译:使用多维模式游程码的测试数据压缩

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Test data compression is an efficient methodology in reducing large test data volume for system-on-a-chip designs. In this paper, a variable-to-variable length compression method based on encoding runs of compatible patterns is presented. Test data in the test set is divided into a number of sequences. Each sequence is constituted by a series of compatible patterns in which information such as pattern length and number of pattern runs is encoded. Theoretical analyses on the evolution of the proposed Multi-Dimensional Pattern Run-Length Compression (MD-PRC) are made respectively from one-Dimensional-PRC to three-Dimensional-PRC. To demonstrate the effectiveness of the proposed method, experiments are conducted on both larger ISCAS’89 benchmarks and the industrial circuits with large number of don’t cares. Results show this method can achieve significant compression in test data volume and have good adaptation to industrial-size circuits.
机译:测试数据压缩是一种用于减少片上系统设计的大量测试数据量的有效方法。本文提出了一种基于兼容模式编码运行的变长压缩方法。测试集中的测试数据分为多个序列。每个序列由一系列兼容的图案组成,其中对诸如图案长度和图案行程数之类的信息进行编码。对所提出的多维模式运行长度压缩(MD-PRC)从一维PRC到三维PRC的演变进行了理论分析。为了证明该方法的有效性,我们在较大的ISCAS'89基准测试和大量无关的工业电路上进行了实验。结果表明,该方法可以实现测试数据量的显着压缩,并且对工业规模的电路具有良好的适应性。

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