Test data compression and decompression method using zero-detected run-length code in system-on-chip

摘要

A method of effectively compressing a test vector is introduced for testing a system-on-chip (SOC) semiconductor device. Since the number of test vectors is increased in a SOC, the number of ‘0’s is increased if adjacent test vectors are properly aligned using an ordering algorithm. ‘0000’ is considered as a single block and a counter of ‘0-group’ is incremented by one to encode each further instance of the string ‘0000’. A codeword capable of being decompressed can be generated using only a counter without using a memory block.