首页> 外文期刊>Journal of Electronic Materials >Low-Temperature, Strong SiO2-SiO2 Covalent Wafer Bonding for III–V Compound Semiconductors-to-Silicon Photonic Integrated Circuits
【24h】

Low-Temperature, Strong SiO2-SiO2 Covalent Wafer Bonding for III–V Compound Semiconductors-to-Silicon Photonic Integrated Circuits

机译:III–V化合物半导体与硅光子集成电路的低温,强SiO2 -SiO2 共价晶片键合

获取原文
获取原文并翻译 | 示例
           

摘要

We report a low-temperature process for covalent bonding of thermal SiO2 to plasma-enhanced chemical vapor deposited (PECVD) SiO2 for Si-compound semiconductor integration. A record-thin interfacial oxide layer of 60 nm demonstrates sufficient capability for gas byproduct diffusion and absorption, leading to a high surface energy of 2.65 J/m2 after a 2-h 300°C anneal. O2 plasma treatment and surface chemistry optimization in dilute hydrofluoric (HF) solution and NH4OH vapor efficiently suppress the small-size interfacial void density down to 2 voids/cm2, dramatically increasing the wafer-bonded device yield. Bonding-induced strain, as determined by x-ray diffraction measurements, is negligible. The demonstration of a 50 mm InP epitaxial layer transferred to a silicon-on-insulator (SOI) substrate shows the promise of the method for wafer-scale applications.
机译:我们报告了一种低温过程,用于将热SiO2 与等离子体增强化学气相沉积(PECVD)SiO2 共价键合,以进行硅化合物半导体集成。 60 nm的创纪录的薄界面氧化物层具有足够的气体副产物扩散和吸收能力,经过2小时300°C退火后,表面能高达2.65 J / m2 。在稀氢氟酸溶液和NH4 蒸气中进行O2 等离子体处理和表面化学优化可有效地将小尺寸界面空隙密度抑制到2个空隙/ cm2 ,从而极大地增加了晶片器件的良率。通过X射线衍射测量确定的键合引起的应变可以忽略不计。将50 mm InP外延层转移到绝缘体上硅(SOI)衬底上的演示证明了该方法在晶圆级应用中的前景。

著录项

  • 来源
    《Journal of Electronic Materials》 |2008年第10期|1552-1559|共8页
  • 作者单位

    Department of Electrical and Computer Engineering University of California Santa Barbara Santa Barbara CA 93106 USA;

    Department of Electrical and Computer Engineering University of California Santa Barbara Santa Barbara CA 93106 USA;

    Department of Electrical and Computer Engineering University of California Santa Barbara Santa Barbara CA 93106 USA;

    Department of Electrical and Computer Engineering University of California Santa Barbara Santa Barbara CA 93106 USA;

    Lincoln Laboratory Massachusetts Institute of Technology Lexington MA 02420-9108 USA;

    Lincoln Laboratory Massachusetts Institute of Technology Lexington MA 02420-9108 USA;

    Department of Electrical and Computer Engineering University of California Santa Barbara Santa Barbara CA 93106 USA;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Wafer bonding; hybrid integration; compound semiconductors; silicon-on-insulator; photonic integrated circuits;

    机译:晶圆键合;混合集成;化合物半导体;绝缘体上硅;光子集成电路;

相似文献

  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号