机译:Si混合光子集成电路III-V芯片上晶圆等离子体激活粘合技术的检查
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Transmission Devices Laboratory Sumitomo Electric Industries Ltd.;
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Dept. of Electrical and Electronic Engineering Tokyo Institute of Technology;
Chip-on-Wafer; Plasma activated bonding; III-V/Si hybrid integration;
机译:Si混合光子集成电路III-V芯片上晶圆等离子体激活粘合技术的检查
机译:用于III-V化合物半导体至硅光子集成电路的低温强SiO_(2)-SiO_(2)共价晶圆键合
机译:用于光电异构系统的CMOS,MEMS和光子电路的三维混合集成技术
机译:用于III-V / Si混合光子集成的高产率晶圆上低温等离子体激活键合
机译:III-V量子点光子集成电路用于单光子实验和装置
机译:通过直接融合键合的III-V / Si混合光子器件
机译:用于硅上光子集成电路的硅激光器上的混合III-V