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首页> 外文期刊>Journal of Applied Physics >Semipolar (10-11) GaN growth on silicon-on-insulator substrates: Defect reduction and meltback etching suppression
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Semipolar (10-11) GaN growth on silicon-on-insulator substrates: Defect reduction and meltback etching suppression

机译:在绝缘体上硅衬底上生长半极性(10-11)GaN:减少缺陷和抑制回蚀

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We demonstrate the growth of almost strain-free (10-11) semipolar GaN on silicon-on-insulator (SOI) substrates, with no melt back etching and with a defect density strongly reduced compared to semipolar templates grown on patterned silicon substrates. This is carried out using SIM substrates with a very thin (similar to 150 nm) 6 degrees off (001) Si top layer. By resorting to very small nucleation (111) facets, revealed through chemical etching of the topmost thin Si layer, we are able to diminish significantly the overall dislocation density. Cathodoluminescence and scanning electron microscopy images at different stages of the growth illustrate how the defect density reduction operates and confirm the complete suppression of meltback etching over the whole 2 in. wafer. Low temperature photoluminescence and optical reflectivity indicate that complete strain relaxation is closely achieved ((DX)-X-0 at 3.473 +/- 0.001 eV), compared to semipolar epilayers grown onto "bulk" silicon ((DX)-X-0 at 3.460 eV). Thanks to this efficient strain relaxation, very thick layers, up to 9 mu m, could be obtained crack-free.
机译:我们证明了在绝缘体上硅(SOI)衬底上几乎无应变(10-11)的半极性GaN的生长,与在图案化硅衬底上生长的半极性模板相比,没有回熔蚀刻并且缺陷密度大大降低。这是使用具有非常薄(类似于150 nm)且距(001)Si顶层6度的SIM基板执行的。通过诉诸通过最顶部最薄的硅层的化学刻蚀揭示的非常小的成核(111)刻面,我们能够显着降低总体位错密度。阴极发光和扫描电子显微镜图像在生长的不同阶段说明了缺陷密度的降低是如何进行的,并证实了在整个2英寸晶圆上完全抑制了回熔蚀刻。低温光致发光和光反射率表明,与生长在“散装”硅上的半极性外延层((DX)-X-)相比,接近应变的完全松弛(在3.473 +/- 0.001 eV时((DX)-X-0) 3.460 eV时为0)。由于这种有效的应变松弛,可以获得非常厚的层(最大9微米),并且没有裂纹。

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