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首页> 外文期刊>Japanese Journal of Applied Physics. Part 1, Regular Papers, Brief Communications & Review Papers >Robust Two-Dimensional Stack Capacitor Technologies for 64 Mbit One-Transistor-One-Capacitor Ferroelectric Random Access Memory
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Robust Two-Dimensional Stack Capacitor Technologies for 64 Mbit One-Transistor-One-Capacitor Ferroelectric Random Access Memory

机译:用于64 Mbit一晶体管一电容器铁电随机存取存储器的稳健二维堆栈电容器技术

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摘要

It is very important to develop capacitor module technologies such as robust Pb(Zr_xTi_(1-x))O_3 (PZT) film technology at nm scaled PZT thickness and damage minimized ferroelectric capacitor etching technology are crucial for the success of high density one-transistor-one-capacitor (1T1C) ferroelectric random access memory (FRAM). We resolved this issue from the change of the capacitor etching system and optimization of the PZT/SrRuO_3 (SRO) deposition process. As a result, we realized a highly reliable sensing window for 64 Mbit 1T1C FRAM that were realized by novel technologies such as robust MOCVD PZT deposition technologies, optimized SRO electrode and damage minimized ferroelectric capacitor etching technologies.
机译:开发电容器模块技术非常重要,例如在纳米级PZT厚度下采用坚固的Pb(Zr_xTi_(1-x))O_3(PZT)薄膜技术和最小化铁电电容器刻蚀技术对于高密度单晶体管的成功至关重要。单电容器(1T1C)铁电随机存取存储器(FRAM)。我们通过更改电容器蚀刻系统和优化PZT / SrRuO_3(SRO)沉积工艺来解决此问题。结果,我们实现了针对64 Mbit 1T1C FRAM的高度可靠的感测窗口,该感测窗口是通过诸如稳健的MOCVD PZT沉积技术,优化的SRO电极以及最小化铁电电容器蚀刻技术等新颖技术实现的。

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