Stability Diagrams of Single-Common-Gate Double-Dot Single-Electron Transistors with Arbitrary Junction and Gate Capacitances

摘要

Stability diagrams of single-common-gate double-dot single-electron transistors are drawn in the V_g-V plane using the exact formulas that represent Coulomb blockade conditions, where the gate, source, and drain voltages are V_g, - V/2, and V/2, respectively. The stability regions are arranged along the V_g axis with no overlap. If gate capacitances C_(g1) and C_(g2) satisfy C_(g1)/m_1 - C_(g2)/m_2 = C_0, the stability diagram is periodic with the period of e/C_0 along the V_g axis, where m_1 and m_2 are natural numbers prime to each other. The stability diagram is point-symmetrical with respect to the point (me/2C_0, 0) for all integers m. If V_g increases at V = 0, electrons are transferred into the islands under a rule, which can be explained in terms of periodicity and symmetry. The detailed features are described for the cases of uniform gate capacitances and uniform junction capacitances.