Nano watt power rail-to-rail CMOS amplifier with adaptive biasing circuits for ultralow-power analog LSIs

摘要

In this paper, we present a rail-to-rail folded-cascode amplifier (AMP) with adaptive biasing circuits (ABCs). The circuit uses a nano ampere current reference circuit to achieve ultralow-power and ABCs to achieve high-speed operation. The ABCs are based on conventional circuits and modified to be suitable for rail-to-rail operation. The measurement results demonstrated that the AMP with the proposed ABCs can operate with an ultralow-power of 384 nA when the input voltage was 0.9V and achieve high speeds of 0.162V/mu s at the rise time and 0.233V/mu s at the fall time when the input pulse frequency and the amplitude were 10 kHz and 1.5V(pp), respectively. (C) 2015 The Japan Society of Applied Physics