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首页> 外文期刊>International journal of RF and microwave computer-aided engineering >Study of enhanced DC and analog/radio frequency performance of a vertical super-thin body FET by high-k gate dielectrics
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Study of enhanced DC and analog/radio frequency performance of a vertical super-thin body FET by high-k gate dielectrics

机译:高k门电介质垂直超薄体FET的增强直流和模拟/射频性能研究

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This article reports the DC and analog/radio frequency (RF) response of anewly invented device called vertical super-thin body (VSTB) FET towardshigh-k (Si_3N_4/HfO_2) and low-k (SiO_2) gate dielectrics in conjunctI_(on) with thescaling effect through a well-calibrated Sentaurus TCAD tool. At channellength (L_G) of 20 nm, compared to SiO_2, Si_3N_4 improves various DC parameterssuch as off-state leakage current (I_(off)), on-current (I_(on)), on-to-off currentratio (I_(on)/I_(off) ratio), subthreshold swing (SS), and drain-induced-barrierlowering(DIBL) by 77.15%, 26.2%, one order of magnitude, 15.78%, and 36.2%,respectively. On the other hand, a higher improvement is seen in all these DCparameters for the HfO_2 gate dielectric (I_(off), I_(on), I_(on)/I_(off) ratio, SS, DIBLimproves respectively by 91.8%, 41.57%, two orders of magnitude, 28.28%, and62.71%). The underlying physics behind such excellent improvement isexplained by the device off-state energy band diagram, electrostatic potential,and channel electron density profile for each dielectric. Further, for all the gatedielectrics considered, the device characteristics were studied for a wide rangeof L_G from 10 to 50 nm to reveal the scaling impact on the device performance.Irrespective of the gate dielectric material, the device exhibits excellent performanceat L_G = 10 nm, which in turn indicates to the brilliant scalability of thisnew device. Besides, although Si_3N_4 and HfO_2 increase gate capacitance (C_(gg))/gate-drain capacitance (C_(gd)), due to the extremely low values of C_(gg)/C_(gd),enhanced unit gain cut-off frequency, and gain-bandwidth-product is achieved.In additI_(on), the increased transconductance (g_m) of the device applying Si_3N_4/HfO_2 gate dielectric leads to a higher peak value of TGF, intrinsic gain, TFP,GFP, and GTFP. This study intends to expand the fundamental knowledgeabout such a new device as a VSTB FET and hence, aims to be utilized in thefuture research of this novel device.
机译:本文报告了一个DC和模拟/射频(RF)响应新发明的装置称为垂直超瘦身体(VSTB)FET朝向高k(SI_3N_4 / HFO_2)和低k(SIO_2)栅极电介质在结膜(上)通过校准的Sentaurus TCAD工具进行缩放效果。在频道与SiO_2相比,20nm的长度(l_g),si_3n_4改善了各种DC参数如关闭状态漏电流(I_(关闭)),电流(I_(上)),开关电流比率(i_(上)/ i_(关闭)比率),亚阈值摆动(SS)和漏极引起的阻隔率(DIBL)77.15%,26.2%,一个数量级,15.78%和36.2%,分别。另一方面,所有这些DC都可以看到更高的改进HFO_2栅极电介质的参数(i_(关闭),i_(上),i_(上)/ i_(关闭)比率,ss,dibl分别得到91.8%,41.57%,两个数量级,28.28%,和62.71%)。这种出色的改善背后的潜在物理是用设备断开状态能带图解释,静电潜力,和每个电介质的通道电子密度曲线。此外,对于所有门考虑的电介质,研究了设备特性,宽范围L_G从10到50 nm透露对器件性能的缩放影响。无论栅极介电材料如何,所述器件表现出优异的性能在l_g = 10 nm处,这又指示了这一点的辉煌可扩展性新设备。此外,虽然SI_3N_4和HFO_2增加栅极电容(C_(GG))/栅极 - 漏极电容(C_(GD)),由于C_(GG)/ C_(GD)的极低值,增强的单位增益截止频率,并实现了增益带宽 - 产品。在Additi_(ON)中,应用SI_3N_4的设备的增加的跨导(G_M)/ HFO_2栅极电介质导致TGF的峰值,内在增益,TFP,GFP和GTFP。本研究打算扩大基础知识关于这种新设备作为VSTB FET,因此旨在用于这部小型设备的未来研究。

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