Variable-Ratio Digital Frequency Dividers: Analogue Design Methodology and Phase Noise Analysis Based on Harmonic Balance

摘要

A unifying analogue description of the operation principle of digital dividers is proposed. A simple switched-ring oscillator is used as the basic block to build a reference model of fixed-ratio dividers, which is extended to variable-ratio dividers, serving as a design guide. The concept of variable-ratio digital frequency dividers as switched-ring oscillators justifies the proposal of a procedure for analyzing added phase noise across their whole operating bandwidth, based on a prior harmonic balance (HB) simulation and taking into account single transistor noise source models. Application of HB and Envelope-Transient simulation techniques to digital dividers is discussed. A 3-4 dual-modulus prescaler implemented in Source-Coupled FET Logic (SCFL) and manufactured in commercially available GaAs technology provides an example to illustrate the method.