A Novel Approach to Minimize RMS Errors in Multifunctional Chips

摘要

In this contribution, a novel approach, based on single cells permutations, is presented for the minimization of RMS errors in digitally controlled subsystems. The method is described and demonstrated for phase-shifting functionalities, but it can be easily applied to different subsystems. By using the proposed approach, the designer is able to choose the best cell configuration, fulfilling arbitrary specification goals. An X-band GaAs multifunctional chip (MFC) for T/R Module applications, composed by a six-bit phase shifter, six-bit attenuator, T/R switch, and on-board serial-to-parallel converter has been designed, realized, tested, and presented here as a test vehicle of the methodology. Measured results include a 4.5° maximum RMS phase error, 1.2 dB maximum RMS spurious ampli-tude error, and better than 13 dB input and output return losses for all phase and ampli-tude settings over the whole 9.0-10.2 GHz operating bandwidth.