Zn-memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC)

摘要

'Computations inside Memory' has become a latest area of research as 'memory with computing skills' accelerates the chances of developing teyond-Von Neumann machines', that is believed to be advantageous in terms of performance and energy-efficiency. 'Memristors' are considered as potential devices for building such memories, as they are highly dense, non-volatile scalable devices with faster switching times and lower energy dissipation and are also compatible with the existing CMOS-technology. Additionally, memristors fit in crossbar structure and can perform logic-computations, when different voltages are applied across them. Previously, various synthesis works have been reported for logic realization using memristors. But logic blocks, implemented using synthesis tools, are not always completely optimized. In this context, we present the alternative memristive-designs for the two most commonly used digital units-Delay (D) and Toggle (T) flip-flops. The proposed designs are based on Memristor Aided loGIC (MAGIC) design style and are specific to crossbar-based pure memristive-memories. A relevant simulation methodology is presented for simulating the proposed MAGIC-designs of D and T flip-flops in Cadence Virtuoso. Comparison with the existing designs of D, T flip-flops (using IMPLY) revealed that both the proposed D, T flip-flops are more performance-efficient (by 28.571%, 20% respectively) and more energy-efficient (by 83.873%, 82.905% respectively) than their corresponding IMPLY-peers. Also, the proposed D, T flip-flops are found to use reduced crossbar areas (by 46.667%, 45% respectively) relative to their counterparts generated using a recent synthesis technique, which makes the designs suitable for massive parallel executions inside memristive-memories of any size.