...
首页> 外文期刊>IEEE Transactions on Instrumentation and Measurement >Adaptive High-Performance Velocity Evaluation Based on a High-Resolution Time-to-Digital Converter
【24h】

Adaptive High-Performance Velocity Evaluation Based on a High-Resolution Time-to-Digital Converter

机译:基于高分辨率时间数字转换器的自适应高性能速度评估

获取原文
获取原文并翻译 | 示例

摘要

In this paper, an improved method is presented to derive the velocity information in a pulse-number measurement/time-duration-type digital tachometer by processing its pulse train. The method incorporates encoder pulse counting and very accurate time measurement. The velocity sampling interval is not constant but is continuously modified. An adaptive algorithm provides a wide-range velocity evaluation with very good accuracy. The adaptation of the next sampling period, according to the instant velocity, results in better response times at low speeds and a very high accuracy at medium and high speeds. Compared to currently known methods, the time measurement resolution and, consequently, the velocity accuracy is improved by using the proposed method due to the inclusion of high-resolution time-to-digital converters in the design. The proposed configuration can be implemented in specific hardware by using field-programmable gate arrays (FPGAs), thus saving the computational power of the digital signal processor that supervises the system for higher level control tasks.
机译:本文提出了一种改进的方法,通过处理其脉冲序列来导出脉冲数测量/持续时间型数字转速计中的速度信息。该方法结合了编码器脉冲计数和非常精确的时间测量。速度采样间隔不是恒定的,而是不断修改的。自适应算法可提供非常精确的宽范围速度评估。根据瞬时速度来适应下一个采样周期,可以在低速下获得更好的响应时间,在中速和高速下获得很高的精度。与目前已知的方法相比,由于在设计中包括了高分辨率的时间数字转换器,因此通过使用所提出的方法可以提高时间测量的分辨率,从而提高速度精度。通过使用现场可编程门阵列(FPGA),可以在特定的硬件中实现建议的配置,从而节省了监督系统进行更高级别控制任务的数字信号处理器的计算能力。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号