Guided-Probe Diagnosis of LSIs Containing Macrocells

摘要

A novel method for the guided-probe diagnosis of high-performance LSIs containing macrocells, which have no internal netlist essential to the diagnosis, has been developed. In this method the macrocell netlist is derived from its layout by extracting a leaf- cell-level netlist and is combined with the original one. Logic models for the leaf cells in the extracted netlist are also generated to obtain the logic-simulation data in the macrocells. The logic modeling is extended for application to memory macrocells. Based on the idea that analog- behavior leaf cells in the memory macrocells are converted into logi- cally equivalent circuits for logic simulation.