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A Built-in Self-Reconfigurable Scheme for 3D Mesh Arrays

机译:3D网格阵列的内置自可重新配置方案

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We propose a model for fault tolerant 3D pro- cessor arrays using one-and-half track switches. Spare proces- sors are laid on the two opposite surfaces of the 3D array. The fault compensation process is performed by shifting processors on a continuous straight line (called compensation path) from a faulty processor to a spare on the surfaces. It is not allowed that compensantion paths are in the near-miss relation each other [2]. Then, switches with only 4 states are needed to preserve the 3D mesh topology after compensating for faults. We give an algo- rithm in a convenient form for reconfiguring by hardware the 3D mesh arrays with faults. The algorithm can reconfigure the 3D mesh arrays in polynomial time. By computer simulation, we show the survival rates and the reliabilities of arrays which express the efficiencies of reconfiguration according to the algo- rithm. The reliabilities are compared with those of the model using double tracks for which the near-miss relation among com- pensation paths is allowed, but whose hardware overhead is al- most double of that of the proposed model using one-and-half track. Finally, we design a logical circuit for hardware realiza- tion of the algorithm. Using the circuit, we can construct such a built-in self-reconfigurable 3D mesh array that the reconfigura- tion is done very quickly without an aid of a host computer.
机译:我们提出了一个使用半跟踪开关的容错3D处理器阵列模型。备用处理器放置在3D阵列的两个相对表面上。通过在连续的直线(称为补偿路径)上将处理器从故障处理器移动到表面的备用零件来执行故障补偿过程。不允许补偿路径彼此之间处于近乎未命中的关系[2]。然后,仅需4种状态的开关即可在补偿故障后保留3D网格拓扑。我们以一种方便的形式给出了一种算法,用于通过硬件重新配置有故障的3D网格阵列。该算法可以在多项式时间内重新配置3D网格阵列。通过计算机仿真,我们显示了根据算法表示重组效率的阵列的存活率和可靠性。将可靠性与使用双磁道的模型的可靠性进行比较,该双磁道允许补偿路径之间的近似误差关系,但其硬件开销几乎是使用半磁道的拟议模型的两倍。最后,我们为该算法的硬件实现设计了一个逻辑电路。使用该电路,我们可以构建一个内置的可自我重新配置的3D网格阵列,从而无需主机就可以非常快速地完成重新配置。

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