An RTL Design-Space Exploration Method for High-Level Applications

摘要

In this paper, we present an RTL design-space exploration method for high-level applications. We formulate the RTL design-space exploration into a performance-driven module Selection problem. We devise a dynamic-programming algorithm To solve the problem. We present an exploration flow by inte- Grating commercial synthesis and layout tools with our proposed Method. Experimental results have demonstrated that generat- Ing AT-curve for all modules in the most time consuming task In the design-space exploration process. Using the proposed 3- Point AT projection approach, our method can achieve on an Average of 80/100 speed-up in run time and 90/100 accuracy in design Estimation.