Experimental Characterization and Modeling of Transmission Line Effects for High-Speed VLSI Circuit Interconnects

摘要

IC interconnect transmission line effects due to the characteristics of a silicon substrate and current return path impedances are physically investigated and experimentally char- acterized. With the investigation, a novel transmission line model is developed, taking these effects into account. Then an accurate signal delay on the IC interconnect lines is analyzed by using the transmission line model.