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A High-Speed and Multi-Chip WTA/MAX Circuit Design Based on Averaged-Value Comparison Approach

机译:基于平均值比较法的高速多芯片WTA / MAX电路设计

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摘要

This paper presents a voltage-mode WTA/MAX circuit that achieves high-speed and multi-chip features. Based on the efficient averaged-value comparison approach, the time and hardware complexities are proportional to O(log N) and O(N) respectively, where N is the number of inputs. In addition, a voltage comparison element (VCE) circuit is proposed to achieve multi-chip function. In the proposed circuit, the averaged-value calculator is built using resistor array that prevents the matching problem of transistor array. The whole circuit was fabricated with the TSMC 0.35 μm signal-poly quadruple-metal CMOS process. With eight input signals, the measurement results show that the proposed circuit resolved input voltages differing by 10 mV in 30 ns, and the multi-chip capability was also verified.
机译:本文介绍了一种电压模式WTA / MAX电路,该电路可实现高速和多芯片功能。基于有效的平均值比较方法,时间和硬件复杂度分别与O(log N)和O(N)成正比,其中N为输入数。另外,提出了一种电压比较元件(VCE)电路来实现多芯片功能。在所提出的电路中,均值计算器是使用电阻器阵列构建的,可以防止晶体管阵列的匹配问题。整个电路采用台积电0.35μm信号-多晶硅四金属CMOS工艺制造。通过八个输入信号,测量结果表明,所提出的电路在30 ns内分辨了10 mV的输入电压,并且还验证了多芯片能力。

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