A Highly Linear CMOS Transconductor

摘要

A linear CMOS transconductor is presented. PMOS transistors are employed in the resistor-replacement and voltage-level shifting to avoid the body effect. To annihilate the non-linear voltage terms, the substrate-bias effect of MOS transistors is treated more accurately in our design. Consequently, the non-linearity of the large-signal transconductance is reduced. The fabricated circuit occupies an area of 245 μm x 176 μm (≈ 0.043 mm~2) and dissipates 0.87 mW from a 3.3 V supply. For an input of 1 V_(p-p), the measured output total harmonic distortion is less than 1.2%. The transconductance varies by less than 0.5% in the input range.