Design of Low-Noise, Low-Power 10-GHz VCO Using 0.18-μm CMOS Technology

摘要

A low-noise, low-power 10-GHz CMOS VCO was developed using cost-effective 0.18-μm CMOS technology. A complementary cross-coupled topology was employed to decrease the power dissipation and phase noise. The fabricated VCO demonstrates a low phase noise of -106 dBc/Hz at an offset frequency of 1 MHz and a low power dissipation of 4.4 mW.