Spurious Reduction Techniques for DDS-Based Synthesizers

摘要

This paper analyzes the spurious sources in DDS synthesizers and deduces the simple model of DDS output signal. The method of feeding pseudo-random noise into the phase accumulator for spurious reduction is discussed. A new method for spurious reduction by compensating for DAC integer nonlinearity is proposed with two DACs and a power combiner. One DAC generates the error signal to compensate for the other DAC INL. The factor how the amplitude error and the phase error between the two combined signals affect the spurious level is also analyzed. The experiment shows that the spurious reduction can be improved by at least 18 dB, which proves the validity of the DAC INL compensation method for the spurious reduction.