nMOSダイナミック論理を用いた液晶駆動由路の設計手法

摘要

LCDs (Liquid Crystal Displays) have established a firm foothold on the market as flat panel displays, initially for calculators, subsequently for personal computers, mobile appliances, digital cameras, and presently for TVs. Apart from large-scale or high-quality LCDs used for TVs or digital cameras, respectively, the design target of small-scale LCDs used for mobile appliances is now focused not only on the power consumption but also on the production cost Drivers of LCDs are usually implemented by CMOS logic, in which while the input level to a logic gate is not changed, no current flows from the source (Vdd) to the ground (Vss), whereas when the input level changes between high and low, transient current penetrates from Vdd to Vss, for which the power consumption grows with the rise of the operating frequency.rnThis paper intends to implement two sub-circuits of a driver of small-scale LCD by means of 4-phase nMOS dynamic logic, which was originally developed for early-time calculators. The main reason of adopting this logic is that it spares the pMOS processing to reduce the production cost, and moreover that it can exploit the potential of lowering the power consumption by avoiding the penetrating current incurred in a CMOS logic gate. First, two sub-circuits (shift register and timing generator) are implemented by 3- and 4-phase nMOS dynamic logic as well as by CMOS logic, and then power consumptions in these circuits are evaluated for comparison. It is also shown that the implementation by 3- and 4-phase nMOS dynamic logic can reduce the power consumption of a driver much more than that by CMOS logic.%携帯電話など甲携帯情報機器で使用する小規模液晶表示装置の駆動回路では、消費電力の低渾化だけでなく、いまや製造コストの削減も求められている。この駆動回路をnMOSの単チャネル論理を用いて実装する場合には、pMOSのプロセス工程を省くことができ、CMOS論理を用いた実装よりも製造コストの削減が可能となる。そこで、本文では、初期の電卓用に開発きれた4相ダイナミック論理に注目し、これを用いて駆動回路の実装を試みる。具体的には、4相nMOSダイナミック論理とそれから派生する3和nMOSダイナミック論理を用いて、駆動回路の電力消費の主要部をなすシフトレジスタおよびタイミングジェネレータを実装し、CMOS論理を用いて実装した場合との消費電流の比較評価を行い、4相nMOSダイナミック論理の実用性について記述する。