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Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

机译:具有肖特基源极的功率UMOSFET的单事件烧断硬化结构

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This paper investigates the single-event burnout (SEB) simulation results for both the standard and hardened structure of power U-shape gate MOSFETs (UMOSFETs). The Schottky source is proposed to reduce the work of the parasitic bipolar transistor inherent to the device. The hardened structure of power UMOSFETs with the Schottky source and N buffer layer is given, which can work normally and improve the SEB performance effectively. Both 70- and 120-V power MOSFETs are simulated and discussed in this paper. The SEB threshold voltages are increased to more than 94 percent of the breakdown voltages for both 70- and 120-V hardened structure, compared to 54 percent for standard power UMOSFETs.
机译:本文研究了功率U型栅极MOSFET(UMOSFET)的标准结构和硬化结构的单事件烧坏(SEB)仿真结果。提出了肖特基源,以减少器件固有的寄生双极晶体管的工作。给出了具有肖特基源极和N缓冲层的功率UMOSFET的硬化结构,可以正常工作并有效地提高SEB性能。本文对70V和120V功率MOSFET进行了仿真和讨论。对于70和120 V的硬化结构,SEB阈值电压提高到击穿电压的94%以上,而标准功率UMOSFET的SEB阈值电压则提高到击穿电压的94%以上。

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