A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter

摘要

The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.