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A Low Noise Pixel Architecture for Scientific CMOS Monolithic Active Pixel Sensors

机译:适用于科学CMOS单片有源像素传感器的低噪声像素架构

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摘要

This paper presents the design and characterisation of FORTIS (4T Test Image Sensor), which is a low noise, CMOS monolithic active pixel sensor for scientific applications. The pixels present in FORTIS are based around the four transistor (4T) pixel architecture, which is already widely used in the commercial imaging community. The sensor design contains thirteen different variants of the 4T pixel architecture to investigate the effects of changing its core parameters. The variants include differences in the pixel pitch, the diode size, the in-pixel source follower, and the capacitance of the floating diffusion node (the input node of the in-pixel source follower). Processing variations have also been studied, which include varying the resistivity of the epitaxial layer and investigating the effects of a special deep p-well layer. By varying these parameters, the 4T pixel architecture can be optimised for scientific applications where detection of small amounts of charge is required.
机译:本文介绍了FORTIS(4T测试图像传感器)的设计和特性,它是一种用于科学应用的低噪声CMOS单片有源像素传感器。 FORTIS中存在的像素基于四晶体管(4T)像素架构,该架构已在商业成像界广泛使用。该传感器设计包含13种4T像素架构的不同变体,以研究更改其核心参数的影响。这些变体包括像素间距,二极管尺寸,像素内源极跟随器和浮动扩散节点(像素内源极跟随器的输入节点)的电容的差异。还研究了工艺变化,其中包括改变外延层的电阻率,并研究特殊的深p阱层的影响。通过更改这些参数,可以针对需要检测少量电荷的科学应用优化4T像素架构。

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