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A Real-Time Data Acquisition and Processing Framework Based on FlexRIO FPGA and ITER Fast Plant System Controller

机译:基于FlexRIO FPGA和ITER快速工厂系统控制器的实时数据采集与处理框架

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Measurement and control of the plasma in real-time are critical for advanced Tokamak operation. It requires high speed real-time data acquisition and processing. ITER has designed the Fast Plant System Controllers (FPSC) for these purposes. At J-TEXT Tokamak, a real-time data acquisition and processing framework has been designed and implemented using standard ITER FPSC technologies. The main hardware components of this framework are an Industrial Personal Computer (IPC) with a real-time system and FlexRIO devices based on FPGA. With FlexRIO devices, data can be processed by FPGA in real-time before they are passed to the CPU. The software elements are based on a real-time framework which runs under Red Hat Enterprise Linux MRG-R and uses Experimental Physics and Industrial Control System (EPICS) for monitoring and configuring. That makes the framework accord with ITER FPSC standard technology. With this framework, any kind of data acquisition and processing FlexRIO FPGA program can be configured with a FPSC. An application using the framework has been implemented for the polarimeter-interferometer diagnostic system on J-TEXT. The application is able to extract phase-shift information from the intermediate frequency signal produced by the polarimeter-interferometer diagnostic system and calculate plasma density profile in real-time. Different algorithms implementations on the FlexRIO FPGA are compared in the paper.
机译:实时测量和控制等离子体对于高级Tokamak操作至关重要。它需要高速的实时数据采集和处理。 ITER为此目的设计了快速工厂系统控制器(FPSC)。在J-TEXT Tokamak,使用标准ITER FPSC技术设计和实现了实时数据采集和处理框架。该框架的主要硬件组件是带有实时系统的工业个人计算机(IPC)和基于FPGA的FlexRIO设备。使用FlexRIO器件,可以在将数据传递到CPU之前通过FPGA对其进行实时处理。这些软件元素基于在Red Hat Enterprise Linux MRG-R下运行的实时框架,并使用实验物理和工业控制系统(EPICS)进行监视和配置。这使框架符合ITER FPSC标准技术。利用此框架,可以使用FPSC配置任何类型的数据采集和处理FlexRIO FPGA程序。使用该框架的应用程序已在J-TEXT上实现了用于偏振计干涉仪的诊断系统。该应用程序能够从偏振计干涉仪诊断系统产生的中频信号中提取相移信息,并实时计算等离子体密度分布。本文比较了FlexRIO FPGA上的不同算法实现。

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