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首页> 外文期刊>IEEE Transactions on Microwave Theory and Techniques >Integrated RF Interference Suppression Filter Design Using Bond-Wire Inductors
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Integrated RF Interference Suppression Filter Design Using Bond-Wire Inductors

机译:使用键合线电感器的集成式RF干扰抑制滤波器设计

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摘要

Design techniques are presented for the realization of high-performance integrated interference suppression filters using bond-wire inductors. A new configuration is proposed for mitigating the impact of mutual coupling between the bond wires. A differential low-noise amplifier with an integrated on-chip passive interference suppression filter is designed at 2.1 GHz in a 0.18-$mu{hbox {m}}$ CMOS process, and achieves a transmit leakage suppression of 10 dB at 190-MHz offset. The differential filter uses metal–insulator–metal capacitors and bond-wire inductors and occupies only 0.22 ${hbox {mm}}^{2}$ . The cascaded system achieves a measured gain of 9.5 dB with a 1.6-dB noise figure and $-{hbox{5 dBm}}$ out-of-band ${rm IIP}_{3}$ and consumes 11 mA from a 2-V supply.
机译:提出了使用键合线电感器实现高性能集成干扰抑制滤波器的设计技术。提出了一种新的配置,以减轻键合线之间相互耦合的影响。带有集成片内无源干扰抑制滤波器的差分低噪声放大器在0.18- $ mu {hbox {m}} $ CMOS工艺中设计为2.1 GHz,在190-MHz时可实现10 dB的发射泄漏抑制偏移量。差分滤波器使用金属-绝缘体-金属电容器和键合线电感,仅占0.22 $ {hbox {mm}} ^ {2} $。级联系统具有1.6 dB的噪声系数和$ {{hbox {5 dBm}} $带外$ {rm IIP} _ {3} $,可实现9.5 dB的测量增益,并且从2消耗11 mA -V电源。

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