Digital Doherty Amplifier With Enhanced Efficiency and Extended Range

摘要

In this paper, a digital Doherty power amplifier (PA) with improved efficiency performance over a wide power range is proposed. The efficiency enhancement is achieved by using a digitally controlled dynamic input power distribution scheme implemented to improve the active load modulation mechanism and to minimize the drive power waste into the peaking branch at backed-off power levels. Furthermore, the proposed distribution scheme causes the premature saturation of the carrier amplifier of the proposed Doherty PA and results in an extended range of high back-off efficiency. A comprehensive study of the operational principle of the proposed efficiency-extended digital Doherty PA is provided to demonstrate its merits and to enlighten its operation. In particular, the current and power profiles of the proposed digital Doherty PA are exposed and its efficiency characteristics analyzed. For experimental validation, the proposed Doherty PA is implemented within the dual-input digitally driven architecture based on a 10-W gallium–nitride transistor. Using a one-carrier Worldwide Interoperability for Microwave Access signal with a 9-dB peak-to-average power ratio and 10-MHz bandwidth, the digitally linearized efficiency-extended Doherty PA exhibited an excellent drain efficiency of 50% along with ${-}$ 38 dB of relative constellation error. The efficiency enhancement is 7% in comparison to a conventional fully analog Doherty PA.