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Exploring Low Loss Suspension Interconnects for High Data Rates in Hard Disk Drives

机译:探索低损耗的悬挂互连,以提高硬盘驱动器中的数据速率

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For high data rate applications, current suspension interconnect solutions should stay above 50 Ohm differential impedance $({rm Z}_{rm diff})$ due to footprint limitations and frequency dependent ohmic losses of the stainless steel plane at low ${rm Z}_{rm diff}$. This paper describes the impedance and bandwidth (BW) design space of today''s interconnects and also shows why this technology is still compatible with current system front-ends up to 3 Gb/s. Furthermore, the benefits of reduced power and higher overshoot using less than 50 Ohm impedance and high bandwidth interconnects are explored with a system model. Three alternate low impedance interconnect structures are used to demonstrate these benefits, and are explored analytically and evaluated for mechanical tradeoffs.
机译:对于高数据速率应用,由于占地面积限制和低$ {rm Z时不锈钢平面的频率相关欧姆损耗,电流悬架互连解决方案应保持在50欧姆差分阻抗$ {{rm Z} _ {rm diff})$以上} _ {rm diff} $。本文介绍了当今互连的阻抗和带宽(BW)设计空间,并说明了为何该技术仍与当前高达3 Gb / s的系统前端兼容。此外,系统模型还探索了使用小于50欧姆的阻抗和高带宽互连来降低功耗和提高过冲的好处。三种替代的低阻抗互连结构用于证明这些好处,并进行了分析和评估以寻求机械权衡。

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