A Novel Oscillation-Based Reconfigurable In-Memory Computing Scheme With Error Correction

摘要

In-memory computing promises to overcome memory and power walls by allowing efficient computing of operations inside the memory without the need to explicitly transfer operands back and forth to the processor core. This paradigm is enabled by emerging resistive memory technology and the adjustment of the memory periphery to perform the computation. The existing methods to perform in-memory calculations are either bound to a specific technology or do not scale well for complex multi-input functions. In this article, we propose a new technique for in-memory computing using resistive devices to calculate the symmetric Boolean logic operations for any number of inputs. In our proposed method, we first convert the equivalent resistance state that is generated by storing devices to an electrical oscillation, and later, time-based sensing for these oscillations is employed to generate the required output. Since the computation using our proposed technique is based on the oscillations, it can be easily tuned for different computation tasks depending on applications. This is used to implement an efficient column-wise error-correction code (ECC) for in-memory computing. We have performed extensive Monte Carlo simulations to confirm the functionality of our proposed method in the presence of process variation. Compared with state-of-the-art comparative-based schemes, for a two-bit in-memory XOR computation, our proposed technique can improve dynamic energy by 41% and additionally scales well for more number of inputs. Results show a reduction of the parity overhead by 10% in our evaluated memory and an area reduction of 21% compared with conventional ECC circuits.