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A silicon compiler of analog fuzzy controllers: from behavioral specifications to layout

机译:模拟模糊控制器的硅编译器:从行为规范到布局

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摘要

In this paper, a silicon compiler for analog fuzzy controllers is described. The layout is generated automatically, starting from global-system specifications accepted as a set of classical fuzzy rules involving fuzzy sets as well as numerical data, often available from numerical examples. The system relies on a library of basic cells designed using a CMOS n-well 0.7 /spl mu/m technology and on the use of Cadence software. Multi-inputs multi-outputs fuzzy logic-based controllers are synthesized, and the area and power requirements by any specific application are optimized. Some prototypes designed using the proposed methodology have been fabricated. For example, a two-inputs two-outputs fuzzy controller implementing a 2D rational function and a sinusoidal function requires, including the I/O circuitry, 1.9 mm/sup 2/ of silicon area, and the total power consumption is 44 mW at 5 V power supply. The maximum propagation delay, assuming a step input function, is 0.57 /spl mu/sec. The total computation time using a SUN Sparc2 Workstation is about 25 min, from specification of the expected behavior to layout.
机译:在本文中,描述了用于模拟模糊控制器的硅编译器。布局是从全局系统规范开始自动生成的,全局规范被接受为一组经典的模糊规则,其中包括模糊集以及数值数据(通常可从数值示例中获得)。该系统依赖于使用CMOS n-well 0.7 / spl mu / m技术设计的基本单元库,以及Cadence软件的使用。综合了多输入多输出基于模糊逻辑的控制器,并优化了任何特定应用的面积和功率要求。已经制造出一些使用建议的方法设计的原型。例如,实现2D有理函数和正弦函数的双输入双输出模糊控制器需要包括I / O电路,1.9 mm / sup 2 /硅面积,并且在5时总功耗为44 mW V电源。假设有步进输入功能,则最大传播延迟为0.57 / spl mu / sec。从指定预期行为到布局,使用SUN Sparc2工作站的总计算时间约为25分钟。

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