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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >A provably good multilayer topological planar routing algorithm in IC layout designs
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A provably good multilayer topological planar routing algorithm in IC layout designs

机译:IC布局设计中一种可证明良好的多层拓扑平面布线算法

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摘要

A provably good approximation algorithm for the multilayer topological planar routing problem is presented. The algorithm, called the iterative-peeling algorithm, finds a solution whose weight is guaranteed to be at least 1-(1/e) approximately=63.2% of the weight of an optimal solution. The algorithm works for multiterminal nets and arbitrary number of routing layers. For a fixed number of routing layers, even tighter performance bounds are used. In particular, the performance ratio of the iterative-peeling algorithm is at least 75% for two-layer routing and is at least 70.4% for three-layer routing. Experimental results confirm that the algorithm can always route a majority of the nets without using vias, even when the number of routing layers is fairly small.
机译:提出了多层拓扑平面路由问题的一种可证明的良好近似算法。该算法称为迭代剥离算法,它找到权重保证至少为最优解权重的1-(1 / e)= 63.2%的解。该算法适用于多终端网络和任意数量的路由层。对于固定数量的路由层,甚至使用更严格的性能范围。尤其是,对于两层路由,迭代剥离算法的性能比至少为75%,对于三层路由,则为至少70.4%。实验结果证实,即使路由层的数量很小,该算法也始终可以路由大多数网络而无需使用过孔。

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