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首页> 外文期刊>Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on >An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form
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An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form

机译:SSA形式的高级综合中过程间寄存器分配的最佳线性时间算法

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摘要

An optimal linear-time algorithm for interprocedural register allocation in high level synthesis is presented. Historically, register allocation has been modeled as a graph coloring problem, which is nondeterministic polynomial time-complete in general; however, converting each procedure to static single assignment (SSA) form ensures a chordal interference graph, which can be colored in $O(vert V vert +vert E vert)$ time; the interprocedural interference graph (IIG) is not guaranteed to be chordal after this transformation. An extension to SSA form is introduced which ensures that the IIG is chordal, and the conversion process does not increase its chromatic number. The resulting IIG can then be colored in linear-time.
机译:提出了高级综合中过程间寄存器分配的最佳线性时间算法。从历史上看,寄存器分配已被建模为图着色问题,通常是不确定的多项式时间完成。但是,将每个过程转换为静态单一分配(SSA)形式可确保产生弦干扰图,该图可以在$ O(vert V vert + vert E vert)$时间内着色;过程转换后的过程间干扰图(IIG)不能保证是弦式的。引入了对SSA形式的扩展,以确保IIG是弦式的,并且转换过程不会增加其色数。然后可以在线性时间内对生成的IIG进行着色。

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