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Generation of sequential symbolic network functions for large-scalenetworks by circuit reduction to two-port

机译:通过将电路简化为两个端口,为大型网络生成顺序符号网络功能

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The major stumbling block in symbolic analysis of large-scale circuits is the exponential growth of expression complexity with the circuit size. Sequential techniques, introduced more than a decade ago, reduced that growth to quasi-linear. The fundamental assumption in all sequential methods developed so far is that the circuit must be decomposed in order to reduce the complexity or the final expression. In this paper we show conclusively that this is not the case. We describe a new algebraic approach to symbolic analysis of large-scale networks, based on the reduction of the compacted modified node admittance matrix to a two-port matrix. No circuit partitioning is required. Internal variables are suppressed one by one using Gaussian elimination. To minimize the number of symbolic operations we employ a locally optimal pivoting strategy. Formula complexity is estimated to grow quasi-linearly with circuit size. The technique is conceptually very simple and produces sequential formulae of significantly lesser complexity than any exact method published to date
机译:大规模电路符号分析的主要绊脚石是表达式复杂度随电路大小的指数增长。十多年前引入的顺序技术将这种增长降低到准线性。迄今为止开发的所有顺序方法中的基本假设是,必须对电路进行分解,以降低复杂性或最终表达式。在本文中,我们得出结论,事实并非如此。我们描述了一种新的代数方法来对大型网络进行符号分析,其基础是将压缩的修改后的节点导纳矩阵简化为两端口矩阵。无需电路分区。使用高斯消除将内部变量一一抑制。为了最大程度地减少符号操作的次数,我们采用了局部最优的旋转策略。公式的复杂度估计会随着电路大小而近似线性增长。该技术从概念上讲非常简单,并且产生的序列公式的复杂度要比迄今为止发布的任何精确方法都要低

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