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Low-Voltage CMOS Subthreshold Log-Domain Filtering

机译:低压CMOS亚阈值对数域滤波

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This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its sub threshold region. Three different sets of complete basic building blocks are proposed along with all required auxiliary circuitry and a specific matrix design procedure to obtain stable and compact filter implementations. Also, all-MOS filter implementations following these circuit techniques are studied. Simulated and experimental examples are given at 1-V supply voltage for 1.2- and 0.35-μm CMOS technologies. The resulting circuit techniques are suitable to integrate very low-voltage low-power system-on-a-chip audio applications, such as hearing aids, in standard CMOS technologies.
机译:本文介绍了一套完整的超低电压基本构建块以及一种用于标准甚至数字CMOS技术中的日志过滤的紧凑设计方法。这些新建议基于可替代的跨线性环路原理,适用于在其子阈值范围内工作的MOSFET。提出了三组不同的完整基本构建块以及所有必需的辅助电路和特定的矩阵设计程序,以实现稳定而紧凑的滤波器实现。此外,还研究了遵循这些电路技术的全MOS滤波器实施方案。在1.2V和0.35μmCMOS技术的1V电源电压下给出了仿真和实验示例。所得的电路技术适用于在标准CMOS技术中集成超低电压,低功耗的片上系统音频应用,例如助听器。

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