Modeling $R{-}2R$ Segmented-Ladder DACs

摘要

Although $R{-}2R$ ladders are commonly used as digital-to-analog converter (DAC) cores, complete equivalent circuits are still missing from the literature for most of the configurations used in practice. In this paper, expressions for the input and output impedances of $R{-}2R$ ladders are derived for current- and voltage-mode operations. In addition, since many DACs use segmentation to reach higher resolutions, the impedance expressions are also obtained for different segmentation schemes. Using these expressions, the existing current-mode model is extended to segmented architectures, and a new equivalent circuit is proposed for voltage-mode designs. This allows modeling the most common $R{-}2R$ DAC designs. Simulation results produced with the proposed models are compared to measurements on two 14-bit $R{-}2R$ DAC prototypes. These results demonstrate how impedance variation with code can limit the static performances of high-resolution converters.