...
首页> 外文期刊>IEEE Micro >Hierarchical Temporal Memory on the Automata Processor
【24h】

Hierarchical Temporal Memory on the Automata Processor

机译:自动机处理器上的分层时间记忆

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       

摘要

While modern machine learning has made significant strides toward achieving high aptitude in various cognitive tasks, it does not provide any of the general abilities of mammalian intelligence. With a fundamentally different approach, Hierarchical Temporal Memory (HTM) is based on biological evidence that a common set of principles in the neocortex provides a diverse set of intelligent functions. Hierarchical temporal memories (HTMs) are biomimetic algorithms that can similarly be trained to perform inference and prediction on any temporal datastream. The Automata Processor (AP) is a configurable silicon implementation of nondeterministic finite automata, designed for massively parallel pattern matching. Key correspondences between counter-extended nondeterministic finite automata and the HTM activation model indicate use of the AP as an efficient hardware accelerator. In this article, the authors introduce a methodology for synthesizing HTMs on the Automata Processor, demonstrate three prediction applications on their model, and show its potential to achieve between 137 to 446 times speedup over the CPU.
机译:尽管现代机器学习已在实现各种认知任务中的高智能方面取得了长足的进步,但它并未提供任何哺乳动物智能的一般能力。通过根本不同的方法,分层时间记忆(HTM)基于生物学证据,即新皮层中的一组通用原则提供了多种智能功能。分层时间存储器(HTM)是仿生算法,可以类似地对其进行训练,以对任何时间数据流执行推断和预测。自动机处理器(AP)是非确定性有限自动机的可配置芯片实现,旨在用于大规模并行模式匹配。反向扩展的不确定自动机和HTM激活模型之间的关键对应关系表明将AP用作有效的硬件加速器。在本文中,作者介绍了一种在Automata处理器上合成HTM的方法,在其模型上演示了三个预测应用程序,并展示了其在CPU上实现137至446倍加速的潜力。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号