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首页> 外文期刊>IEEE Journal of Solid-State Circuits >512-Mb PROM With a Three-Dimensional Array of Diode/Antifuse Memory Cells
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512-Mb PROM With a Three-Dimensional Array of Diode/Antifuse Memory Cells

机译:带有二极管/反熔丝存储单元三维阵列的512 Mb PROM

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摘要

A 512-Mb one-time-programmable memory is described, which uses a transistorless two-terminal memory cell containing an antifuse and a diode. Cells are fabricated in polycrystalline silicon, stacked vertically in eight layers above a 0.25-μm CMOS substrate. One-time programming is performed by applying a high voltage across the cell terminals, which ruptures the antifuse and permanently encodes a logic 0. Unruptured antifuses encode a logic 1. Cells are arranged in 8-Mb tiles, 1 K rows by 1 K columns by 8 bits high. The die contains 72 such tiles: 64 tiles for data and eight tiles for error-correcting code bits. Wordline and bitline decoders, bias circuits, and sense amplifiers are built in the CMOS substrate directly beneath the memory tiles, improving die efficiency. The device supports a generic standard NAND flash interface and operates from a single 3.3-V supply.
机译:描述了一种512 Mb一次性可编程存储器,该存储器使用包含反熔丝和二极管的无晶体管两端存储单元。电池由多晶硅制成,在0.25μmCMOS基板上方垂直堆叠八层。通过在单元端子两端施加高电压来执行一次性编程,这会使反熔丝破裂并永久编码逻辑0。未破裂的反熔丝编码逻辑1。单元被排列在8 Mb磁贴中,每行1 K乘以1 K列高8位。芯片包含72个这样的图块:64个图块用于数据,八个图块用于纠错代码位。字线和位线解码器,偏置电路和读出放大器内置在CMOS衬底中,位于存储块的正下方,从而提高了芯片效率。该器件支持通用标准NAND闪存接口,并采用3.3V单电源供电。

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