Square-rooting and vector summation circuits using currentconveyors

摘要

Recently, Lui [1995] presented a square-rooting circuit usingnCCII, MOS transistors and a buffered unity-gain inverting amplifier. Itnis interesting since it finds various applications as described in hisnpaper. However, an error occurred in the paper. An ambiguity about thenpolarity of the output will occur in practice. In fact, the racingncondition of currents through both MOS transistors will determine thenoutput polarity of the circuit, which is random. It will be troublesomenin actual applications and this ambiguity must be eliminated. Tonovercome this ambiguity, we suggest adding the full wave rectifier toneither the output of the buffered inverting amplifier or the z-terminalnof the CCII