GA-based design of multiplierless 2-D state-space digital filterswith low roundoff noise

摘要

A new design method for multiplierless two-dimensional (2-D)nstate-space digital filters (SSDFs) with very low roundoff noise isnpresented. To eliminate multipliers in the hardware implementation,nmultiplierless 2-D SSDFs are designed under the constraint that allncoefficients are expressed as one or two powers-of-two terms. They arenattractive for low-cost implementation and high-speed operation. Innaddition, they can also perform highly accurate 2 D digital filteringnbecause of very low roundoff noise. A combinatorial optimisation methodnbased on a genetic algorithm (GA) is given to determine thencoefficients. A stability test routine is also embedded in the GA-basedndesign procedure to ensure the stability of the resultant multiplierlessnSSDFs. The proposed method can design multiplierless 2-D SSDFs not onlynwith small approximation error but also with almost minimum roundoffnnoise. In addition they require fewer computational volume than 2-DnSSDFs designed in a continuous coefficient space. For 16-bit words, thendesigned multiplierless 2-D SSDFs can be implemented with 24%, of thencomputational volume of 2-D SSDFs with real multipliers. Theneffectiveness of the proposed methods is demonstrated by two designnexamples