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Low roundoff noise digital filter

机译:低舍入噪声数字滤波器

摘要

An error feedback circuit is employed in a digital filter to significantly lower noise in the output by feeding back the least significant (roundoff) output bits of the quantizer rather than throwing these bits away as is done in the prior art. The feedback circuit for accomplishing this end result includes a digital delay circuit which receives the roundoff bits and delays these bits for a sampling sequence (Z.sup.-1) (as is also done for the rounded bits), a multiplier which multiplies the output of the delay circuit by a predetermined integer and an adder which subtracts the output of the multiplier from the delayed filtered digital output signal which has been multiplied by a predetermined constant.
机译:在数字滤波器中采用误差反馈电路,通过反馈量化器的最低有效(舍入)输出位而不是像现有技术那样将这些位扔掉,从而显着降低输出中的噪声。完成此最终结果的反馈电路包括一个数字延迟电路,它接收舍入位并将这些位延迟采样序列(Z.sup.-1)(也对舍入位也是如此),一个乘法器。延迟电路的输出由预定整数和加法器组成,该加法器从已与预定常数相乘的延迟滤波数字输出信号中减去乘法器的输出。

著录项

  • 公开/公告号US4236224A

    专利类型

  • 公开/公告日1980-11-25

    原文格式PDF

  • 申请/专利权人 ROCKWELL INTERNATIONAL CORP;

    申请/专利号US19780973543

  • 发明设计人 TIEN-LIN CHANG;

    申请日1978-12-26

  • 分类号G06F15/31;

  • 国家 US

  • 入库时间 2022-08-22 14:51:41

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